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author | Michael Sterrett <mr_bones_@gentoo.org> | 2003-09-08 07:26:35 +0000 |
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committer | Michael Sterrett <mr_bones_@gentoo.org> | 2003-09-08 07:26:35 +0000 |
commit | 6e5b0bf6b9e13f68be758d5da7487d96824192f4 (patch) | |
tree | 1c6d17224f60ee60e4cf2fb3951a3708a91364d0 /app-sci/modelsim | |
parent | repoman: fix leading whitespace (diff) | |
download | historical-6e5b0bf6b9e13f68be758d5da7487d96824192f4.tar.gz historical-6e5b0bf6b9e13f68be758d5da7487d96824192f4.tar.bz2 historical-6e5b0bf6b9e13f68be758d5da7487d96824192f4.zip |
repoman: header fix
Diffstat (limited to 'app-sci/modelsim')
-rw-r--r-- | app-sci/modelsim/Manifest | 2 | ||||
-rw-r--r-- | app-sci/modelsim/modelsim-5.7d.ebuild | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/app-sci/modelsim/Manifest b/app-sci/modelsim/Manifest index ea2c7a1becc1..266442ab4a43 100644 --- a/app-sci/modelsim/Manifest +++ b/app-sci/modelsim/Manifest @@ -1,4 +1,4 @@ MD5 c516bb12d24cb03e4525b9245398036d ChangeLog 379 -MD5 0fc87d8529b65386a8495bc3d97e91c4 modelsim-5.7d.ebuild 1265 +MD5 77611d50a2f76b52c451551a1ce49c0b modelsim-5.7d.ebuild 1267 MD5 8c623e53daafa025137077c6b65815bd metadata.xml 156 MD5 8fa4c00b62753751c5c7ecac997e4524 files/digest-modelsim-5.7d 205 diff --git a/app-sci/modelsim/modelsim-5.7d.ebuild b/app-sci/modelsim/modelsim-5.7d.ebuild index 357dbc910567..54849df45f3b 100644 --- a/app-sci/modelsim/modelsim-5.7d.ebuild +++ b/app-sci/modelsim/modelsim-5.7d.ebuild @@ -1,6 +1,6 @@ -# Copyright 1999-2002 Gentoo Technologies, Inc. +# Copyright 1999-2003 Gentoo Technologies, Inc. # Distributed under the terms of the GNU General Public License v2 -# $Header: /var/cvsroot/gentoo-x86/app-sci/modelsim/modelsim-5.7d.ebuild,v 1.1 2003/07/10 19:26:56 vapier Exp $ +# $Header: /var/cvsroot/gentoo-x86/app-sci/modelsim/modelsim-5.7d.ebuild,v 1.2 2003/09/08 07:26:32 msterret Exp $ DESCRIPTION="VHDL and mixed-VHDL/Verilog simulator" HOMEPAGE="http://www.model.com/" |