Add patches for bug #451680 and #452768.

3 files changed, 207 insertions, 1 deletions

diff --git a/4.6.3/gentoo/81_all_arm_4.7_pr48808_VFP_LO_REGS.patch b/4.6.3/gentoo/81_all_arm_4.7_pr48808_VFP_LO_REGS.patch
new file mode 100644
index 0000000..d3b4f94
--- /dev/null
+++ b/4.6.3/gentoo/81_all_arm_4.7_pr48808_VFP_LO_REGS.patch
@@ -0,0 +1,146 @@
+error: unable to find a register to spill in class 'VFP_LO_REGS'
+
+http://gcc.gnu.org/PR48808
+https://bugs.gentoo.org/452768
+
+
+2011-06-01  Richard Sandiford  <rdsandiford@googlemail.com>
+
+	PR rtl-optimization/48830
+	PR rtl-optimization/48808
+	PR rtl-optimization/48792
+	* reload.c (push_reload): Check contains_reg_of_mode.
+	* reload1.c (strip_paradoxical_subreg): New function.
+	(gen_reload_chain_without_interm_reg_p): Use it to handle
+	paradoxical subregs.
+	(emit_output_reload_insns, gen_reload): Likewise.
+
+
+--- a/gcc/reload.c
++++ b/gcc/reload.c
+@@ -1017,6 +1017,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
+ #ifdef CANNOT_CHANGE_MODE_CLASS
+       && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, rclass)
+ #endif
++      && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (in))]
+       && (CONSTANT_P (SUBREG_REG (in))
+ 	  || GET_CODE (SUBREG_REG (in)) == PLUS
+ 	  || strict_low
+@@ -1123,6 +1124,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
+ #ifdef CANNOT_CHANGE_MODE_CLASS
+       && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, rclass)
+ #endif
++      && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (out))]
+       && (CONSTANT_P (SUBREG_REG (out))
+ 	  || strict_low
+ 	  || (((REG_P (SUBREG_REG (out))
+--- a/gcc/reload1.c
++++ b/gcc/reload1.c
+@@ -4478,6 +4478,43 @@ scan_paradoxical_subregs (rtx x)
+ 	}
+     }
+ }
++
++/* *OP_PTR and *OTHER_PTR are two operands to a conceptual reload.
++   If *OP_PTR is a paradoxical subreg, try to remove that subreg
++   and apply the corresponding narrowing subreg to *OTHER_PTR.
++   Return true if the operands were changed, false otherwise.  */
++
++static bool
++strip_paradoxical_subreg (rtx *op_ptr, rtx *other_ptr)
++{
++  rtx op, inner, other, tem;
++
++  op = *op_ptr;
++  if (GET_CODE (op) != SUBREG)
++    return false;
++
++  inner = SUBREG_REG (op);
++  if (GET_MODE_SIZE (GET_MODE (op)) <= GET_MODE_SIZE (GET_MODE (inner)))
++    return false;
++
++  other = *other_ptr;
++  tem = gen_lowpart_common (GET_MODE (inner), other);
++  if (!tem)
++    return false;
++
++  /* If the lowpart operation turned a hard register into a subreg,
++     rather than simplifying it to another hard register, then the
++     mode change cannot be properly represented.  For example, OTHER
++     might be valid in its current mode, but not in the new one.  */
++  if (GET_CODE (tem) == SUBREG
++      && REG_P (other)
++      && HARD_REGISTER_P (other))
++    return false;
++
++  *op_ptr = inner;
++  *other_ptr = tem;
++  return true;
++}
+ 
+ /* A subroutine of reload_as_needed.  If INSN has a REG_EH_REGION note,
+    examine all of the reload insns between PREV and NEXT exclusive, and
+@@ -5558,7 +5595,7 @@ gen_reload_chain_without_interm_reg_p (int r1, int r2)
+      chain reloads or do need an intermediate hard registers.  */
+   bool result = true;
+   int regno, n, code;
+-  rtx out, in, tem, insn;
++  rtx out, in, insn;
+   rtx last = get_last_insn ();
+ 
+   /* Make r2 a component of r1.  */
+@@ -5577,11 +5614,7 @@ gen_reload_chain_without_interm_reg_p (int r1, int r2)
+ 
+   /* If IN is a paradoxical SUBREG, remove it and try to put the
+      opposite SUBREG on OUT.  Likewise for a paradoxical SUBREG on OUT.  */
+-  if (GET_CODE (in) == SUBREG
+-      && (GET_MODE_SIZE (GET_MODE (in))
+-	  > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
+-      && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (in)), out)) != 0)
+-    in = SUBREG_REG (in), out = tem;
++  strip_paradoxical_subreg (&in, &out);
+ 
+   if (GET_CODE (in) == PLUS
+       && (REG_P (XEXP (in, 0))
+@@ -7583,7 +7616,6 @@ emit_output_reload_insns (struct insn_chain *chain, struct reload *rl,
+ 	      if (tertiary_icode != CODE_FOR_nothing)
+ 		{
+ 		  rtx third_reloadreg = rld[tertiary_reload].reg_rtx;
+-		  rtx tem;
+ 
+ 		  /* Copy primary reload reg to secondary reload reg.
+ 		     (Note that these have been swapped above, then
+@@ -7592,13 +7624,7 @@ emit_output_reload_insns (struct insn_chain *chain, struct reload *rl,
+ 		  /* If REAL_OLD is a paradoxical SUBREG, remove it
+ 		     and try to put the opposite SUBREG on
+ 		     RELOADREG.  */
+-		  if (GET_CODE (real_old) == SUBREG
+-		      && (GET_MODE_SIZE (GET_MODE (real_old))
+-			  > GET_MODE_SIZE (GET_MODE (SUBREG_REG (real_old))))
+-		      && 0 != (tem = gen_lowpart_common
+-			       (GET_MODE (SUBREG_REG (real_old)),
+-				reloadreg)))
+-		    real_old = SUBREG_REG (real_old), reloadreg = tem;
++		  strip_paradoxical_subreg (&real_old, &reloadreg);
+ 
+ 		  gen_reload (reloadreg, second_reloadreg,
+ 			      rl->opnum, rl->when_needed);
+@@ -8414,16 +8440,8 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
+ 
+   /* If IN is a paradoxical SUBREG, remove it and try to put the
+      opposite SUBREG on OUT.  Likewise for a paradoxical SUBREG on OUT.  */
+-  if (GET_CODE (in) == SUBREG
+-      && (GET_MODE_SIZE (GET_MODE (in))
+-	  > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
+-      && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (in)), out)) != 0)
+-    in = SUBREG_REG (in), out = tem;
+-  else if (GET_CODE (out) == SUBREG
+-	   && (GET_MODE_SIZE (GET_MODE (out))
+-	       > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
+-	   && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (out)), in)) != 0)
+-    out = SUBREG_REG (out), in = tem;
++  if (!strip_paradoxical_subreg (&in, &out))
++    strip_paradoxical_subreg (&out, &in);
+ 
+   /* How to do this reload can get quite tricky.  Normally, we are being
+      asked to reload a simple operand, such as a MEM, a constant, or a pseudo
diff --git a/4.6.3/gentoo/82_all_alpha_4.6.4_pr56023_bootstrap.patch b/4.6.3/gentoo/82_all_alpha_4.6.4_pr56023_bootstrap.patch
new file mode 100644
index 0000000..c3fa75f
--- /dev/null
+++ b/4.6.3/gentoo/82_all_alpha_4.6.4_pr56023_bootstrap.patch
@@ -0,0 +1,56 @@
+[4.6 Regression]: [alpha] -fcompare-debug failure due to sched1 pass
+
+http://gcc.gnu.org/PR56023
+https://bugs.gentoo.org/451680
+
+
+Author: uros
+Date: Mon Jan 21 18:02:57 2013
+New Revision: 195345
+
+URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=195345
+Log:
+    PR rtl-optimization/56023
+    * haifa-sched.c (fix_inter_tick): Do not update ticks of instructions,
+    dependent on debug instruction.
+
+testsuite/ChangeLog:
+
+    PR rtl-optimization/56023
+    * gcc.dg/pr56023.c: New test.
+
+
+--- a/gcc/haifa-sched.c
++++ b/gcc/haifa-sched.c
+@@ -3684,6 +3684,9 @@ fix_inter_tick (rtx head, rtx tail)
+ 	      INSN_TICK (head) = tick;
+ 	    }
+ 
++      if (DEBUG_INSN_P (head))
++	    continue;
++
+ 	  FOR_EACH_DEP (head, SD_LIST_RES_FORW, sd_it, dep)
+ 	    {
+ 	      rtx next;
+--- /dev/null
++++ b/gcc/testsuite/gcc.dg/pr56023.c
+@@ -0,0 +1,19 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fcompare-debug" } */
++
++void
++foo (char *c)
++{
++  unsigned int x = 0;
++  unsigned int i;
++
++  for (i = 0; c[i]; i++)
++    {
++      if (i >= 5 && x != 1)
++	break;
++      else if (c[i] == ' ')
++	x = i;
++      else if (c[i] == '/' && c[i + 1] != ' ' && i)
++	x = i + 1;
++    }
++}
diff --git a/4.6.3/gentoo/README.history b/4.6.3/gentoo/README.history
index 27385f3..b101805 100644
--- a/4.6.3/gentoo/README.history
+++ b/4.6.3/gentoo/README.history
@@ -1,4 +1,8 @@
-1.10    14 Jan 2013
+1.11	21 Jan 2013
+	+ 81_all_arm_4.7_pr48808_VFP_LO_REGS.patch
+	+ 82_all_alpha_4.6.4_pr56023_bootstrap.patch
+
+1.10	14 Jan 2013
 	+ 80_all_arm_4.7_pr50946_qt-webkit-ICE.patch
 
 1.9		21 Dec 2012