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authorChenghua Xu <paul.hua.gm@gmail.com>2018-08-29 20:55:25 +0800
committerChenghua Xu <paul.hua.gm@gmail.com>2018-08-29 20:55:25 +0800
commit9108bc33b1ca0b2e930c0cce5b1a0394e33e86be (patch)
treeadb7aaf17163d449da228c09b5f7c94b80e3163d /elfcpp
parent[MIPS] Add Loongson 3A2000/3A3000 proccessor support. (diff)
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[MIPS] Add Loongson 2K1000 proccessor support.
bfd/ * archures.c (bfd_architecture): New machine bfd_mach_mips_gs264e. * bfd-in2.h (bfd_architecture): Likewise. * cpu-mips.c (enum I_xxx): Likewise. (arch_info_struct): Likewise. * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_GS264E. (mips_set_isa_flags): Likewise. (mips_mach_extensions): Map bfd_mach_mips_gs264e to bfd_mach_mips_gs464e extension. binutils/ * NEWS: Mention Loongson 2K1000 proccessor support. * readelf.c (get_machine_flags): Handle gs264e. elfcpp/ * mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS264E. gas/ * config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS264E. (mips_cpu_info_table): Add gs264e descriptors. * doc/as.texi (march table): Add gs264e. include/ * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E. * opcode/mips.h (CPU_XXX): New CPU_GS264E. ld/ * testsuite/ld-mips-elf/mips-elf-flags.exp: Run good_combination gs264e and gs464e. opcodes/ * mips-dis.c (mips_arch_choices): Add gs264e descriptors.
Diffstat (limited to 'elfcpp')
-rw-r--r--elfcpp/ChangeLog4
-rw-r--r--elfcpp/mips.h1
2 files changed, 5 insertions, 0 deletions
diff --git a/elfcpp/ChangeLog b/elfcpp/ChangeLog
index c7442995668..ecae362353a 100644
--- a/elfcpp/ChangeLog
+++ b/elfcpp/ChangeLog
@@ -1,5 +1,9 @@
2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+ * mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS264E.
+
+2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+
* mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS464E.
2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
diff --git a/elfcpp/mips.h b/elfcpp/mips.h
index 277300f8f60..c724fd0ab43 100644
--- a/elfcpp/mips.h
+++ b/elfcpp/mips.h
@@ -237,6 +237,7 @@ enum
E_MIPS_MACH_LS2F = 0x00A10000,
E_MIPS_MACH_GS464 = 0x00A20000,
E_MIPS_MACH_GS464E = 0x00A30000,
+ E_MIPS_MACH_GS264E = 0x00A40000,
};
// MIPS architecture