crosscompile fixes + uclibc patches

10 files changed, 522 insertions, 45 deletions

diff --git a/sys-devel/gcc/ChangeLog b/sys-devel/gcc/ChangeLog
index 528ba0aefc74..13164458a44d 100644
--- a/sys-devel/gcc/ChangeLog
+++ b/sys-devel/gcc/ChangeLog
@@ -1,6 +1,16 @@
 # ChangeLog for sys-devel/gcc
 # Copyright 1999-2004 Gentoo Foundation; Distributed under the GPL v2
-# $Header: /var/cvsroot/gentoo-x86/sys-devel/gcc/ChangeLog,v 1.338 2004/10/26 02:27:04 lv Exp $
+# $Header: /var/cvsroot/gentoo-x86/sys-devel/gcc/ChangeLog,v 1.339 2004/10/26 04:46:03 vapier Exp $
+
+  26 Oct 2004; Mike Frysinger <vapier@gentoo.org>
+  +files/3.4.2/400-mips-pr17565.patch, +files/3.4.2/401-ppc-eabi-typo.patch,
+  +files/3.4.2/600-gcc34-arm-ldm-peephole.patch,
+  +files/3.4.2/601-gcc34-arm-ldm.patch,
+  +files/3.4.2/602-sdk-libstdc++-includes.patch,
+  +files/3.4.2/700-pr15068-fix.patch, +files/3.4.2/800-arm-bigendian.patch,
+  +files/3.4.2/810-arm-bigendian-uclibc.patch, gcc-3.4.2-r3.ebuild:
+  Import a bunch of patches from uclibc and merge a bunch of misc
+  cross-compiling fixes.
 
 *gcc-3.4.2-r3 (25 Oct 2004)
 
diff --git a/sys-devel/gcc/files/3.4.2/400-mips-pr17565.patch b/sys-devel/gcc/files/3.4.2/400-mips-pr17565.patch
new file mode 100644
index 000000000000..7ae6aa56f6f3
--- /dev/null
+++ b/sys-devel/gcc/files/3.4.2/400-mips-pr17565.patch
@@ -0,0 +1,102 @@
+[committed] Fix target/17565: asms in delay slots
+
+    * From: Richard Sandiford <rsandifo at redhat dot com>
+    * To: gcc-patches at gcc dot gnu dot org
+    * Date: Mon, 20 Sep 2004 07:55:58 +0100
+    * Subject: [committed] Fix target/17565: asms in delay slots
+
+The MIPS port was allowing asms to be put into delay slots if the
+compiler guesses they are only one instruction long.  This is wrong
+because of the possibility of it containing macros.
+
+The problem can be reproduced as an assembler warning
+in the following testcase:
+
+int foo (int n)
+{
+  register int k asm ("$16") = n;
+  if (k > 0)
+    {
+      bar ();
+      asm ("li %0,0x12345678" : "=r" (k));
+    }
+  return k;
+}
+
+because the multi-instruction asm statement goes into the delay
+slot of the call to bar().
+
+This is reduced from a much more serious linux problem.  Linux is fond
+of using empty asm statements, and since gcc estimates empty asms to be
+one instruction long, they too might be put into delay slots.  This
+actually has the effect of putting the following instruction into the
+delay slot instead.  Since there's no assembler warning, the problem was
+only detected as a run-time failure.
+
+The fix is simple: set the asm value of "can_delay" to "no".
+Tested on mipsisa64-elf, applied to mainline.
+
+This problem goes back to at least 2.95, so it isn't technically a
+regression.  On the other hand, it's the kind of bug that could trigger
+for different types of code in different releases, so I'm sure there's
+a testcase that fails (say) in 3.4 and not in 2.95.  Will probably ask
+Mark for permission to backport to 3.4.
+
+Richard
+
+
+	PR target/17565
+	* config/mips/mips.md (define_asm_attributes): Set can_delay to no.
+
+testsuite/
+	* gcc.target/mips/asm-1.c: New test.
+
+Index: config/mips/mips.md
+===================================================================
+RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
+retrieving revision 1.306
+diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.306 mips.md
+*** gcc/gcc/config/mips/mips.md	13 Sep 2004 19:32:05 -0000	1.306
+--- gcc/gcc/config/mips/mips.md	20 Sep 2004 06:52:31 -0000
+*************** (define_attr "may_clobber_hilo" "no,yes"
+*** 266,272 ****
+  
+  ;; Describe a user's asm statement.
+  (define_asm_attributes
+!   [(set_attr "type" "multi")])
+  
+  ;; .........................
+  ;;
+--- 266,273 ----
+  
+  ;; Describe a user's asm statement.
+  (define_asm_attributes
+!   [(set_attr "type" "multi")
+!    (set_attr "can_delay" "no")])
+  
+  ;; .........................
+  ;;
+Index: testsuite/gcc.target/mips/asm-1.c
+===================================================================
+RCS file: testsuite/gcc.target/mips/asm-1.c
+diff -N testsuite/gcc.target/mips/asm-1.c
+*** gcc/gcc/testsuite/gcc.target/mips/asm-1.c	1 Jan 1970 00:00:00 -0000
+--- gcc/gcc/testsuite/gcc.target/mips/asm-1.c	20 Sep 2004 06:52:31 -0000
+***************
+*** 0 ****
+--- 1,14 ----
++ /* PR target/17565.  GCC used to put the asm into the delay slot
++    of the call.  */
++ /* { dg-do assemble } */
++ /* { dg-options "-O" } */
++ int foo (int n)
++ {
++   register int k asm ("$16") = n;
++   if (k > 0)
++     {
++       bar ();
++       asm ("li %0,0x12345678" : "=r" (k));
++     }
++   return k;
++ }
+
diff --git a/sys-devel/gcc/files/3.4.2/401-ppc-eabi-typo.patch b/sys-devel/gcc/files/3.4.2/401-ppc-eabi-typo.patch
new file mode 100644
index 000000000000..dbb856868ded
--- /dev/null
+++ b/sys-devel/gcc/files/3.4.2/401-ppc-eabi-typo.patch
@@ -0,0 +1,20 @@
+revision 1.12
+date: 2004/07/16 15:13:40;  author: segher;  state: Exp;  lines: +1 -1
+        * config/rs6000/eabi.asm (__eabi_convert): Fix typo (cmpi vs. cmpwi).
+Index: gcc/config/rs6000/eabi.asm
+===================================================================
+RCS file: /cvs/gcc/gcc/gcc/config/rs6000/eabi.asm,v
+retrieving revision 1.11
+retrieving revision 1.12
+diff -u -b -B -w -p -r1.11 -r1.12
+--- gcc/gcc/config/rs6000/eabi.asm	20 Sep 2002 23:46:58 -0000	1.11
++++ gcc/gcc/config/rs6000/eabi.asm	16 Jul 2004 15:13:40 -0000	1.12
+@@ -252,7 +252,7 @@ FUNC_START(__eabi_convert)
+ 
+ .Lcvt:
+ 	lwzu	6,4(3)				/* pointer to convert */
+-	cmpi	0,6,0
++	cmpwi	0,6,0
+ 	beq-	.Lcvt2				/* if pointer is null, don't convert */
+ 
+         add	6,6,12				/* convert pointer */
diff --git a/sys-devel/gcc/files/3.4.2/600-gcc34-arm-ldm-peephole.patch b/sys-devel/gcc/files/3.4.2/600-gcc34-arm-ldm-peephole.patch
new file mode 100644
index 000000000000..fb317e153713
--- /dev/null
+++ b/sys-devel/gcc/files/3.4.2/600-gcc34-arm-ldm-peephole.patch
@@ -0,0 +1,79 @@
+--- gcc-3.4.0/gcc/config/arm/arm.md.arm-ldm-peephole	2004-01-13 08:24:37.000000000 -0500
++++ gcc-3.4.0/gcc/config/arm/arm.md	2004-04-24 18:18:04.000000000 -0400
+@@ -8810,13 +8810,16 @@
+    (set_attr "length" "4,8,8")]
+ )
+ 
++; Try to convert LDR+LDR+arith into [add+]LDM+arith
++; On XScale, LDM is always slower than two LDRs, so only do this if
++; optimising for size.
+ (define_insn "*arith_adjacentmem"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(match_operator:SI 1 "shiftable_operator"
+ 	 [(match_operand:SI 2 "memory_operand" "m")
+ 	  (match_operand:SI 3 "memory_operand" "m")]))
+    (clobber (match_scratch:SI 4 "=r"))]
+-  "TARGET_ARM && adjacent_mem_locations (operands[2], operands[3])"
++  "TARGET_ARM && (!arm_tune_xscale || optimize_size) && adjacent_mem_locations (operands[2], operands[3])"
+   "*
+   {
+     rtx ldm[3];
+@@ -8851,6 +8854,8 @@
+       }
+    if (val1 && val2)
+       {
++	/* This would be a loss on a Harvard core, but adjacent_mem_locations()
++	   will prevent it from happening.  */
+ 	rtx ops[3];
+ 	ldm[0] = ops[0] = operands[4];
+ 	ops[1] = XEXP (XEXP (operands[2], 0), 0);
+--- gcc-3.4.0/gcc/config/arm/arm.c.arm-ldm-peephole	2004-04-24 18:16:25.000000000 -0400
++++ gcc-3.4.0/gcc/config/arm/arm.c	2004-04-24 18:18:04.000000000 -0400
+@@ -4593,8 +4593,11 @@
+ 	 arith_adjacentmem pattern to output an overlong sequence.  */
+       if (!const_ok_for_op (PLUS, val0) || !const_ok_for_op (PLUS, val1))
+ 	return 0;
+-      
+-      return (reg0 == reg1) && ((val1 - val0) == 4 || (val0 - val1) == 4);
++
++      /* For Harvard cores, only accept pairs where one offset is zero.
++         See comment in load_multiple_sequence.  */
++      return (reg0 == reg1) && ((val1 - val0) == 4 || (val0 - val1) == 4)
++	&& (!arm_ld_sched || val0 == 0 || val1 == 0);
+     }
+   return 0;
+ }
+@@ -4838,6 +4841,11 @@
+       *load_offset = unsorted_offsets[order[0]];
+     }
+ 
++  /* For XScale a two-word LDM is a performance loss, so only do this if
++     size is more important.  See comments in arm_gen_load_multiple.  */
++  if (nops == 2 && arm_tune_xscale && !optimize_size)
++    return 0;
++
+   if (unsorted_offsets[order[0]] == 0)
+     return 1; /* ldmia */
+ 
+@@ -5064,6 +5072,11 @@
+       *load_offset = unsorted_offsets[order[0]];
+     }
+ 
++  /* For XScale a two-word LDM is a performance loss, so only do this if
++     size is more important.  See comments in arm_gen_load_multiple.  */
++  if (nops == 2 && arm_tune_xscale && !optimize_size)
++    return 0;
++
+   if (unsorted_offsets[order[0]] == 0)
+     return 1; /* stmia */
+ 
+--- gcc-3.4.0/gcc/genpeep.c.arm-ldm-peephole	2003-07-05 01:27:22.000000000 -0400
++++ gcc-3.4.0/gcc/genpeep.c	2004-04-24 18:18:04.000000000 -0400
+@@ -381,6 +381,7 @@
+   printf ("#include \"recog.h\"\n");
+   printf ("#include \"except.h\"\n\n");
+   printf ("#include \"function.h\"\n\n");
++  printf ("#include \"flags.h\"\n\n");
+ 
+   printf ("#ifdef HAVE_peephole\n");
+   printf ("extern rtx peep_operand[];\n\n");
diff --git a/sys-devel/gcc/files/3.4.2/601-gcc34-arm-ldm.patch b/sys-devel/gcc/files/3.4.2/601-gcc34-arm-ldm.patch
new file mode 100644
index 000000000000..142052fdf078
--- /dev/null
+++ b/sys-devel/gcc/files/3.4.2/601-gcc34-arm-ldm.patch
@@ -0,0 +1,119 @@
+--- gcc-3.4.0/gcc/config/arm/arm.c.arm-ldm	2004-02-27 09:51:05.000000000 -0500
++++ gcc-3.4.0/gcc/config/arm/arm.c	2004-04-24 18:16:25.000000000 -0400
+@@ -8520,6 +8520,26 @@
+   return_used_this_function = 0;  
+ }
+ 
++/* Return the number (counting from 0) of
++   the least significant set bit in MASK.  */
++
++#ifdef __GNUC__
++inline
++#endif
++static int
++number_of_first_bit_set (mask)
++     int mask;
++{
++  int bit;
++
++  for (bit = 0;
++       (mask & (1 << bit)) == 0;
++       ++bit)
++    continue;
++
++  return bit;
++}
++
+ const char *
+ arm_output_epilogue (rtx sibling)
+ {
+@@ -8753,27 +8773,47 @@
+ 	  saved_regs_mask |=   (1 << PC_REGNUM);
+ 	}
+ 
+-      /* Load the registers off the stack.  If we only have one register
+-	 to load use the LDR instruction - it is faster.  */
+-      if (saved_regs_mask == (1 << LR_REGNUM))
+-	{
+-	  /* The exception handler ignores the LR, so we do
+-	     not really need to load it off the stack.  */
+-	  if (eh_ofs)
+-	    asm_fprintf (f, "\tadd\t%r, %r, #4\n", SP_REGNUM, SP_REGNUM);
+-	  else
+-	    asm_fprintf (f, "\tldr\t%r, [%r], #4\n", LR_REGNUM, SP_REGNUM);
+-	}
+-      else if (saved_regs_mask)
++      if (saved_regs_mask)
+ 	{
+-	  if (saved_regs_mask & (1 << SP_REGNUM))
+-	    /* Note - write back to the stack register is not enabled
+-	       (ie "ldmfd sp!...").  We know that the stack pointer is
+-	       in the list of registers and if we add writeback the
+-	       instruction becomes UNPREDICTABLE.  */
+-	    print_multi_reg (f, "ldmfd\t%r", SP_REGNUM, saved_regs_mask);
++	  /* Load the registers off the stack.  If we only have one register
++	     to load use the LDR instruction - it is faster.  */
++	  if (bit_count (saved_regs_mask) == 1)
++	    {
++	      int reg = number_of_first_bit_set (saved_regs_mask);
++
++	      switch (reg)
++		{
++		case SP_REGNUM:
++		  /* Mustn't use base writeback when loading SP.  */
++		  asm_fprintf (f, "\tldr\t%r, [%r]\n", SP_REGNUM, SP_REGNUM);
++		  break;
++		  
++		case LR_REGNUM:
++		  if (eh_ofs)
++		    {
++		      /* The exception handler ignores the LR, so we do
++			 not really need to load it off the stack.  */
++		      asm_fprintf (f, "\tadd\t%r, %r, #4\n", SP_REGNUM, SP_REGNUM);
++		      break;
++		    }
++		  /* else fall through */
++		  
++		default:
++		  asm_fprintf (f, "\tldr\t%r, [%r], #4\n", reg, SP_REGNUM);
++		  break;
++		}
++	    }
+ 	  else
+-	    print_multi_reg (f, "ldmfd\t%r!", SP_REGNUM, saved_regs_mask);
++	    {
++	      if (saved_regs_mask & (1 << SP_REGNUM))
++		/* Note - write back to the stack register is not enabled
++		   (ie "ldmfd sp!...").  We know that the stack pointer is
++		   in the list of registers and if we add writeback the
++		   instruction becomes UNPREDICTABLE.  */
++		print_multi_reg (f, "ldmfd\t%r", SP_REGNUM, saved_regs_mask);
++	      else
++		print_multi_reg (f, "ldmfd\t%r!", SP_REGNUM, saved_regs_mask);
++	    }
+ 	}
+ 
+       if (current_function_pretend_args_size)
+@@ -11401,22 +11441,6 @@
+     }
+ }
+ 
+-/* Return the number (counting from 0) of
+-   the least significant set bit in MASK.  */
+-
+-inline static int
+-number_of_first_bit_set (int mask)
+-{
+-  int bit;
+-
+-  for (bit = 0;
+-       (mask & (1 << bit)) == 0;
+-       ++bit)
+-    continue;
+-
+-  return bit;
+-}
+-
+ /* Generate code to return from a thumb function.
+    If 'reg_containing_return_addr' is -1, then the return address is
+    actually on the stack, at the stack pointer.  */
diff --git a/sys-devel/gcc/files/3.4.2/602-sdk-libstdc++-includes.patch b/sys-devel/gcc/files/3.4.2/602-sdk-libstdc++-includes.patch
new file mode 100644
index 000000000000..4377c2143b9e
--- /dev/null
+++ b/sys-devel/gcc/files/3.4.2/602-sdk-libstdc++-includes.patch
@@ -0,0 +1,22 @@
+--- gcc-3.4.1/libstdc++-v3/libmath/Makefile.am~	2003-08-27 22:29:42.000000000 +0100
++++ gcc-3.4.1/libstdc++-v3/libmath/Makefile.am	2004-07-22 16:41:45.152130128 +0100
+@@ -32,7 +32,7 @@
+ 
+ libmath_la_SOURCES = stubs.c
+ 
+-AM_CPPFLAGS = $(CANADIAN_INCLUDES)
++AM_CPPFLAGS = $(CANADIAN_INCLUDES) -I$(toplevel_srcdir)/include
+ 
+ # Only compiling "C" sources in this directory.
+ LIBTOOL = @LIBTOOL@ --tag CC
+--- gcc-3.4.1/libstdc++-v3/fragment.am.old	2004-07-22 18:24:58.024083656 +0100
++++ gcc-3.4.1/libstdc++-v3/fragment.am	2004-07-22 18:24:59.019932264 +0100
+@@ -18,7 +18,7 @@
+ 	$(WARN_FLAGS) $(WERROR) -fdiagnostics-show-location=once
+ 
+ # -I/-D flags to pass when compiling.
+-AM_CPPFLAGS = $(GLIBCXX_INCLUDES)
++AM_CPPFLAGS = $(GLIBCXX_INCLUDES) -I$(toplevel_srcdir)/include
+ 
+ 
+ 
diff --git a/sys-devel/gcc/files/3.4.2/700-pr15068-fix.patch b/sys-devel/gcc/files/3.4.2/700-pr15068-fix.patch
new file mode 100644
index 000000000000..2977765c5f1c
--- /dev/null
+++ b/sys-devel/gcc/files/3.4.2/700-pr15068-fix.patch
@@ -0,0 +1,44 @@
+See http://gcc.gnu.org/PR15068
+
+Fixes error
+
+../sysdeps/generic/s_fmax.c: In function `__fmax':
+../sysdeps/generic/s_fmax.c:28: internal compiler error: in elim_reg_cond, at flow.c:3257
+Please submit a full bug report,
+with preprocessed source if appropriate.
+See <URL:http://gcc.gnu.org/bugs.html> for instructions.
+make[2]: *** [/home/dank/wk/crosstool-0.28-rc35/build/arm-unknown-linux-gnu/gcc-3.4.1-glibc-20040822/build-glibc/math/s_fmax.o] Error 1
+make[2]: Leaving directory `/home/dank/wk/crosstool-0.28-rc35/build/arm-unknown-linux-gnu/gcc-3.4.1-glibc-20040822/glibc-20040822/math'
+make[1]: *** [math/others] Error 2
+make[1]: Leaving directory `/home/dank/wk/crosstool-0.28-rc35/build/arm-unknown-linux-gnu/gcc-3.4.1-glibc-20040822/glibc-20040822'
+make: *** [all] Error 2
+
+[ rediffed against gcc-3.4.1, with elbow grease, ending up with same thing as
+http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/flow.c.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.563.4.2&r2=1.563.4.3 ]
+
+--- gcc-3.4.1/gcc/flow.c.old	2004-02-27 19:39:19.000000000 -0800
++++ gcc-3.4.1/gcc/flow.c	2004-08-26 07:29:46.000000000 -0700
+@@ -1878,6 +1878,7 @@
+ 	  rtx set_src = SET_SRC (pc_set (BB_END (bb)));
+ 	  rtx cond_true = XEXP (set_src, 0);
+ 	  rtx reg = XEXP (cond_true, 0);
++ 	  enum rtx_code inv_cond;
+ 
+ 	  if (GET_CODE (reg) == SUBREG)
+ 	    reg = SUBREG_REG (reg);
+@@ -1886,11 +1887,13 @@
+ 	     in the form of a comparison of a register against zero.  
+ 	     If the condition is more complex than that, then it is safe
+ 	     not to record any information.  */
+-	  if (GET_CODE (reg) == REG
++ 	  inv_cond = reversed_comparison_code (cond_true, BB_END (bb));
++ 	  if (inv_cond != UNKNOWN
++	      && GET_CODE (reg) == REG
+ 	      && XEXP (cond_true, 1) == const0_rtx)
+ 	    {
+ 	      rtx cond_false
+-		= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond_true)),
++		= gen_rtx_fmt_ee (inv_cond,
+ 				  GET_MODE (cond_true), XEXP (cond_true, 0),
+ 				  XEXP (cond_true, 1));
+ 	      if (GET_CODE (XEXP (set_src, 1)) == PC)
diff --git a/sys-devel/gcc/files/3.4.2/800-arm-bigendian.patch b/sys-devel/gcc/files/3.4.2/800-arm-bigendian.patch
new file mode 100644
index 000000000000..0bae8f474c26
--- /dev/null
+++ b/sys-devel/gcc/files/3.4.2/800-arm-bigendian.patch
@@ -0,0 +1,70 @@
+By Lennert Buytenhek <buytenh@wantstofly.org>
+Adds support for arm*b-linux* big-endian ARM targets
+
+See http://gcc.gnu.org/PR16350
+
+diff -urN gcc-3.4.1-dist/gcc/config/arm/linux-elf.h gcc-3.4.1/gcc/config/arm/linux-elf.h
+--- gcc-3.4.1-dist/gcc/config/arm/linux-elf.h	2004-08-16 16:01:50.000000000 -0500
++++ gcc-3.4.1/gcc/config/arm/linux-elf.h	2004-08-16 15:43:40.000000000 -0500
+@@ -30,17 +30,34 @@
+ /* Do not assume anything about header files.  */
+ #define NO_IMPLICIT_EXTERN_C
+ 
++/*
++ * 'config.gcc' defines TARGET_BIG_ENDIAN_DEFAULT as 1 for arm*b-*
++ * (big endian) configurations.
++ */
++#if TARGET_BIG_ENDIAN_DEFAULT
++#define TARGET_ENDIAN_DEFAULT ARM_FLAG_BIG_END
++#define TARGET_ENDIAN_OPTION "mbig-endian"
++#define TARGET_LINKER_EMULATION "armelfb_linux"
++#else
++#define TARGET_ENDIAN_DEFAULT 0
++#define TARGET_ENDIAN_OPTION "mlittle-endian"
++#define TARGET_LINKER_EMULATION "armelf_linux"
++#endif
++
+ /* Default is to use APCS-32 mode.  */
+ #undef  TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++		( ARM_FLAG_APCS_32 | \
++		  ARM_FLAG_MMU_TRAPS | \
++		  TARGET_ENDIAN_DEFAULT )
+ 
+ #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
+ 
+-#define SUBTARGET_EXTRA_LINK_SPEC " -m armelf_linux -p"
++#define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION " -p"
+ 
+ #undef  MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+-	{ "marm", "mlittle-endian", "mhard-float", "mapcs-32", "mno-thumb-interwork" }
++	{ "marm", TARGET_ENDIAN_OPTION, "mhard-float", "mapcs-32", "mno-thumb-interwork" }
+ 
+ #define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
+ 
+@@ -101,7 +118,7 @@
+    %{rdynamic:-export-dynamic} \
+    %{!dynamic-linker:-dynamic-linker /lib/ld-linux.so.2} \
+    -X \
+-   %{mbig-endian:-EB}" \
++   %{mbig-endian:-EB} %{mlittle-endian:-EL}" \
+    SUBTARGET_EXTRA_LINK_SPEC
+ #endif
+ 
+diff -urN gcc-3.4.1-dist/gcc/config.gcc gcc-3.4.1/gcc/config.gcc
+--- gcc-3.4.1-dist/gcc/config.gcc	2004-08-16 16:01:50.000000000 -0500
++++ gcc-3.4.1/gcc/config.gcc	2004-08-16 16:01:25.000000000 -0500
+@@ -672,6 +672,11 @@
+ 	;;
+ arm*-*-linux*)			# ARM GNU/Linux with ELF
+ 	tm_file="dbxelf.h elfos.h linux.h arm/elf.h  arm/linux-gas.h arm/linux-elf.h arm/aout.h arm/arm.h"
++	case $target in
++	arm*b-*)
++		tm_defines="TARGET_BIG_ENDIAN_DEFAULT=1 $tm_defines"
++		;;
++	esac
+ 	tmake_file="t-slibgcc-elf-ver t-linux arm/t-linux"
+ 	extra_parts="crtbegin.o crtbeginS.o crtend.o crtendS.o"
+ 	gnu_ld=yes
diff --git a/sys-devel/gcc/files/3.4.2/810-arm-bigendian-uclibc.patch b/sys-devel/gcc/files/3.4.2/810-arm-bigendian-uclibc.patch
new file mode 100644
index 000000000000..a4d87e231741
--- /dev/null
+++ b/sys-devel/gcc/files/3.4.2/810-arm-bigendian-uclibc.patch
@@ -0,0 +1,27 @@
+diff -urN gcc-3.4.1-dist/gcc/config/arm/linux-elf.h gcc-3.4.1/gcc/config/arm/linux-elf.h
+--- gcc-3.4.1-dist/gcc/config/arm/linux-elf.h	2004-08-16 16:08:18.000000000 -0500
++++ gcc-3.4.1/gcc/config/arm/linux-elf.h	2004-08-16 16:06:24.000000000 -0500
+@@ -107,7 +107,7 @@
+    %{rdynamic:-export-dynamic} \
+    %{!dynamic-linker:-dynamic-linker /lib/ld-uClibc.so.0} \
+    -X \
+-   %{mbig-endian:-EB}" \
++   %{mbig-endian:-EB} %{mlittle-endian:-EL}" \
+    SUBTARGET_EXTRA_LINK_SPEC
+ #else
+ #define LINK_SPEC "%{h*} %{version:-v} \
+diff -urN gcc-3.4.1-dist/gcc/config.gcc gcc-3.4.1/gcc/config.gcc
+--- gcc-3.4.1-dist/gcc/config.gcc	2004-08-16 16:08:18.000000000 -0500
++++ gcc-3.4.1/gcc/config.gcc	2004-08-16 16:03:25.000000000 -0500
+@@ -666,6 +666,11 @@
+ 	;;
+ arm*-*-linux-uclibc*)		# ARM GNU/Linux with ELF - uClibc
+ 	tm_file="dbxelf.h elfos.h linux.h arm/elf.h  arm/linux-gas.h arm/linux-elf.h arm/aout.h arm/arm.h"
++	case $target in
++	arm*b-*)
++		tm_defines="TARGET_BIG_ENDIAN_DEFAULT=1 $tm_defines"
++		;;
++	esac
+ 	tmake_file="t-slibgcc-elf-ver t-linux-uclibc arm/t-linux"
+ 	extra_parts="crtbegin.o crtbeginS.o crtend.o crtendS.o"
+ 	gnu_ld=yes
diff --git a/sys-devel/gcc/gcc-3.4.2-r3.ebuild b/sys-devel/gcc/gcc-3.4.2-r3.ebuild
index 9b90b091d614..0986bb643ede 100644
--- a/sys-devel/gcc/gcc-3.4.2-r3.ebuild
+++ b/sys-devel/gcc/gcc-3.4.2-r3.ebuild
@@ -1,6 +1,6 @@
 # Copyright 1999-2004 Gentoo Foundation
 # Distributed under the terms of the GNU General Public License v2
-# $Header: /var/cvsroot/gentoo-x86/sys-devel/gcc/gcc-3.4.2-r3.ebuild,v 1.3 2004/10/26 04:24:12 vapier Exp $
+# $Header: /var/cvsroot/gentoo-x86/sys-devel/gcc/gcc-3.4.2-r3.ebuild,v 1.4 2004/10/26 04:46:03 vapier Exp $
 
 inherit eutils flag-o-matic libtool gnuconfig toolchain
 
@@ -61,26 +61,6 @@ HARDENED_GCC_WORKS="x86 sparc amd64"
 SPLIT_SPECS="${SPLIT_SPECS:="true"}"
 
 
-# Recently there has been a lot of stability problem in Gentoo-land.  Many
-# things can be the cause to this, but I believe that it is due to gcc3
-# still having issues with optimizations, or with it not filtering bad
-# combinations (protecting the user maybe from himeself) yet.
-#
-# This can clearly be seen in large builds like glibc, where too aggressive
-# CFLAGS cause the tests to fail miserbly.
-#
-# Quote from Nick Jones <carpaski@gentoo.org>, who in my opinion
-# knows what he is talking about:
-#
-#   People really shouldn't force code-specific options on... It's a
-#   bad idea. The -march options aren't just to look pretty. They enable
-#   options that are sensible (and include sse,mmx,3dnow when apropriate).
-#
-# The next command strips CFLAGS and CXXFLAGS from nearly all flags.  If
-# you do not like it, comment it, but do not bugreport if you run into
-# problems.
-#
-# <azarah@gentoo.org> (13 Oct 2002)
 gcc_do_filter_flags() {
 	strip-flags
 
@@ -151,6 +131,14 @@ src_unpack() {
 	# misc patches that havent made it into a patch tarball yet
 	epatch ${FILESDIR}/3.4.0/gcc34-reiser4-fix.patch
 	epatch ${FILESDIR}/gcc-spec-env.patch
+	epatch ${FILESDIR}/3.4.2/400-mips-pr17565.patch
+	epatch ${FILESDIR}/3.4.2/401-ppc-eabi-typo.patch
+	epatch ${FILESDIR}/3.4.2/600-gcc34-arm-ldm-peephole.patch
+	epatch ${FILESDIR}/3.4.2/601-gcc34-arm-ldm.patch
+	epatch ${FILESDIR}/3.4.2/602-sdk-libstdc++-includes.patch
+	epatch ${FILESDIR}/3.4.2/700-pr15068-fix.patch
+	epatch ${FILESDIR}/3.4.2/800-arm-bigendian.patch
+	epatch ${FILESDIR}/3.4.2/810-arm-bigendian-uclibc.patch
 
 	# If mips, and we DON'T want multilib, then rig gcc to only use n32 OR n64
 	if use mips && use !multilib; then
@@ -210,7 +198,9 @@ src_install() {
 	S="${WORKDIR}/build" \
 	make DESTDIR="${D}" install || die
 
-	[ -r ${D}${BINPATH}/gcc ] || die "gcc not found in ${D}"
+	if [ "${CHOST}" == "${CTARGET}" ] ; then
+		[ -r ${D}${BINPATH}/gcc ] || die "gcc not found in ${D}"
+	fi
 
 	if [ "${SPLIT_SPECS}" == "true" ] ; then
 		cp ${WORKDIR}/build/*.specs ${D}/${LIBPATH}
@@ -310,23 +300,16 @@ src_install() {
 	fi
 
 	# This one comes with binutils
-	if [ -f "${D}${PREFIX}/lib/libiberty.a" ]
-	then
-		rm -f ${D}${PREFIX}/lib/libiberty.a
-	fi
-	if [ -f "${D}${LIBPATH}/libiberty.a" ]
-	then
-		rm -f ${D}${LIBPATH}/libiberty.a
-	fi
+	rm -f ${D}${PREFIX}/lib/libiberty.a
+	rm -f ${D}${LIBPATH}/libiberty.a
 
 	[ -e ${D}/${PREFIX}/lib/32 ] && rm -rf ${D}/${PREFIX}/lib/32
 
 	cd ${S}
-	if ! use build
-	then
+	if ! use build && [ "${CHOST}" == "${CTARGET}" ] ; then
 		cd ${S}
-		docinto /${CTARGET}
-		dodoc COPYING COPYING.LIB ChangeLog* FAQ MAINTAINERS README
+		docinto ${CTARGET}
+		dodoc ChangeLog* FAQ MAINTAINERS README
 		docinto ${CTARGET}/html
 		dohtml *.html
 		cd ${S}/boehm-gc
@@ -337,18 +320,17 @@ src_install() {
 		cd ${S}/gcc
 		docinto ${CTARGET}/gcc
 		dodoc ChangeLog* FSFChangeLog* LANGUAGES NEWS ONEWS README* SERVICE
-		if use f77
-		then
+		if use f77 ; then
 			cd ${S}/libf2c
 			docinto ${CTARGET}/libf2c
 			dodoc ChangeLog* README TODO *.netlib
 		fi
 		cd ${S}/libffi
 		docinto ${CTARGET}/libffi
-		dodoc ChangeLog* LICENSE README
+		dodoc ChangeLog* README
 		cd ${S}/libiberty
 		docinto ${CTARGET}/libiberty
-		dodoc ChangeLog* COPYING.LIB README
+		dodoc ChangeLog* README
 		if use objc
 		then
 			cd ${S}/libobjc
@@ -367,10 +349,10 @@ src_install() {
 		then
 			cd ${S}/fastjar
 			docinto ${CTARGET}/fastjar
-			dodoc AUTHORS CHANGES COPYING ChangeLog* NEWS README
+			dodoc AUTHORS CHANGES ChangeLog* NEWS README
 			cd ${S}/libjava
 			docinto ${CTARGET}/libjava
-			dodoc ChangeLog* COPYING HACKING LIBGCJ_LICENSE NEWS README THANKS
+			dodoc ChangeLog* HACKING NEWS README THANKS
 		fi
 
 		prepman ${DATAPATH}
@@ -382,10 +364,12 @@ src_install() {
 
 	# Rather install the script, else portage with changing $FILESDIR
 	# between binary and source package borks things ....
-	insinto /lib/rcscripts/awk
-	doins ${FILESDIR}/awk/fixlafiles.awk
-	exeinto /sbin
-	doexe ${FILESDIR}/fix_libtool_files.sh
+	if [ "${CHOST}" == "${CTARGET}" ] ; then
+		insinto /lib/rcscripts/awk
+		doins ${FILESDIR}/awk/fixlafiles.awk
+		exeinto /sbin
+		doexe ${FILESDIR}/fix_libtool_files.sh
+	fi
 
 	# we dont want these in freaky non-versioned paths that dont ever get used
 	if [ -d ${D}/${LIBPATH}/../$(get_libdir) ] ; then