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DEFINED_PHASES=install prepare
DEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=4
HOMEPAGE=http://iverilog.icarus.com/
IUSE=examples
KEYWORDS=amd64 ppc sparc x86
LICENSE=GPL-2
RDEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
SLOT=0
SRC_URI=ftp://icarus.com/pub/eda/verilog/v0.9/verilog-0.9.6.tar.gz
_eclass_exported_funcs=src_prepare:- src_install:-
_eclasses_=eutils ea170b525f6a38a006be05c9d9429f13 multilib 165fc17c38d1b11dac2008280dab6e80 toolchain-funcs 1b1da0c45c555989dc5d832b54880783
_md5_=4a7fa4afa9c0c41eede2680c2ee6a723
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