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author | Yuhang Zeng <unlsycn@unlsycn.com> | 2024-06-13 00:26:34 +0800 |
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committer | Yuhang Zeng <unlsycn@unlsycn.com> | 2024-06-13 00:33:10 +0800 |
commit | a9ac3703f6192a17e1043c7d1a2d56bb7c937420 (patch) | |
tree | 973db7ce5bb6f7e21a17d87767699ff4eaccfaa2 /sci-electronics | |
parent | sys-fs/diskonaut: bump EAPI 7 -> 8 (diff) | |
download | guru-a9ac3703f6192a17e1043c7d1a2d56bb7c937420.tar.gz guru-a9ac3703f6192a17e1043c7d1a2d56bb7c937420.tar.bz2 guru-a9ac3703f6192a17e1043c7d1a2d56bb7c937420.zip |
sci-electronics/circt: add 1.76.0
Signed-off-by: Yuhang Zeng <unlsycn@unlsycn.com>
Diffstat (limited to 'sci-electronics')
-rw-r--r-- | sci-electronics/circt/Manifest | 2 | ||||
-rw-r--r-- | sci-electronics/circt/circt-1.76.0.ebuild | 121 |
2 files changed, 123 insertions, 0 deletions
diff --git a/sci-electronics/circt/Manifest b/sci-electronics/circt/Manifest index 8b58cca33..f6990b87b 100644 --- a/sci-electronics/circt/Manifest +++ b/sci-electronics/circt/Manifest @@ -1,4 +1,6 @@ DIST circt-1.14.0.tar.gz 2152570 BLAKE2B 3901c0d146a4410cc2ee5a0556ce54decea4fb1998b83a2999ec97493efcdefbb2bb0c33b5ee127c9627568bdd92669bf1c064930abf6954aa33cbb382fea006 SHA512 1d2b2696c7ce42cf90a9209f2b0d04862681645cfe733e0dd2f6c48754a9fa035f2d5033b2c0278841edaaee9a72802a00226f210a032e81b79d4d3df5bcf7cf DIST circt-1.37.0.tar.gz 2577579 BLAKE2B 9bb69622c6145615d652a27428c0c4b004b5899c84dee130838a91fb54253da59a550a597cae0d358f768ed06b2e01d69beb838c98b9e8b70786da02999ea4a2 SHA512 8fb33083cafbb75b6b8de2b80b4f087e6ab5ae284703da8f2eb2ab0bcdc93290a1269a469a21e1f24f35a5c52c406790663bd4e93917f1a8e667cf2c2d147b59 +DIST circt-1.76.0.tar.gz 3605366 BLAKE2B 1866f44018fe65ec27df88ff0a6ff6b532f4efd1b607c900074287d32067e896a18442738360cfc2601cb85592cf4d16417423af04addbbfeee3321304ca586c SHA512 d4eeaf9c2d217501cd9f6216d2da9a0320fb413096d27ce6f6f8c3ac184dd2e5ee3aafb59c080c40825f684291d0c1ae529470adc8a43ec8907a6b284da61207 +DIST llvm-project-6595e7fa1b5588f860aa057aac47c43623169584.tar.gz 212235026 BLAKE2B 9a152e93153498942ce246e443f534b26986d7f2578ce8dc6a1fc41f71ac78f8feab080ab302528321b33ecfc8b2889434ff1fb4d8385906493dc2370a215ab4 SHA512 d0f0a5123a3ed54c6b738ea352c5b61d8c136ec054e5a222452904bc28ad26b71f8444f951f67b52ecbcdef7b9cdfab75117c695978ac15beea79aa9c4f97bec DIST llvm-project-d978730d8e2c10c76867b83bec2f1143d895ee7d.tar.gz 181657664 BLAKE2B 77a6efe1952f50c99bfeb6f54d21d445b033e69f69184845748d989650818c205859bd1bf39f6730c78cb4136a32df257bcb18fa351c4bbfbb15c60c47e07137 SHA512 cedc0b17ed9d7b4a7b8393200fc6a512dd557c90b5206305b98d39b2297d7488678b5186bd5a39f8a8e66855c8986c1a82ac156a0203d73cfb359d19e22d5606 DIST llvm-project-fe0f72d5c55a9b95c5564089e946e8f08112e995.tar.gz 166019098 BLAKE2B c3613d5465522249597fe8a882cd4cdd2f8b4030a9fee73c47643f0e64ea0b97a212f9e4637e5a096e30e679460dac039b0c244daf4b0bd04c4da42efb4744d0 SHA512 bc71f42c8af87559fbc384a6cf473b5bdb42a04e698e7e44c94d9ea27f763d7f0bd4dea63e0eef9d29cdfb2ad203b14eeb6431bba336583cfb0ce19f12a40a72 diff --git a/sci-electronics/circt/circt-1.76.0.ebuild b/sci-electronics/circt/circt-1.76.0.ebuild new file mode 100644 index 000000000..55b05c8d1 --- /dev/null +++ b/sci-electronics/circt/circt-1.76.0.ebuild @@ -0,0 +1,121 @@ +# Copyright 1999-2023 Gentoo Authors +# Distributed under the terms of the GNU General Public License v2 + +EAPI="8" + +MY_PV="${PV//./\/}" +MY_LLVM_PV="6595e7fa1b5588f860aa057aac47c43623169584" +CMAKE_BUILD_TYPE="Release" +PYTHON_COMPAT=( python3_{11..12} ) +inherit cmake python-r1 + +DESCRIPTION="The fast free Verilog/SystemVerilog simulator" +HOMEPAGE=" + https://circt.llvm.org + https://github.com/llvm/circt +" + +if [[ "${PV}" == "9999" ]] ; then + inherit git-r3 + EGIT_REPO_URI="https://github.com/llvm/${PN}.git" + S_CIRCT="${EGIT_CHECKOUT_DIR}" + S_LLVM="${S_CIRCT}/llvm" + S="${S_LLVM}/llvm" +else + SRC_URI=" + https://github.com/llvm/circt/archive/refs/tags/firtool-${PV}.tar.gz -> ${P}.tar.gz + https://github.com/llvm/llvm-project/archive/${MY_LLVM_PV}.tar.gz -> llvm-project-${MY_LLVM_PV}.tar.gz + " + KEYWORDS="~amd64 ~arm64 ~riscv ~x86" + S_CIRCT="${WORKDIR}/${PN}-firtool-${PV}" + S_LLVM="${WORKDIR}/llvm-project-${MY_LLVM_PV}" + S="${S_LLVM}/llvm" +fi + +LICENSE="Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc" +SLOT="0" +IUSE="test" +REQUIRED_USE=" ${PYTHON_REQUIRED_USE} " + +RESTRICT="!test? ( test )" + +RDEPEND=" + ${PYTHON_DEPS} + test? ( + dev-python/psutil[${PYTHON_USEDEP}] + sci-electronics/verilator + ) + sys-libs/ncurses:0= +" + +DEPEND=" + ${RDEPEND} +" + +BDEPEND=" + virtual/pkgconfig +" + +DOCS=( + "${S_LLVM}/llvm/llvm-LICENSE.TXT" + "${S_LLVM}/mlir/mlir-LICENSE.TXT" + "${S_CIRCT}/circt-LICENSE" +) + +src_configure() { + python_setup + + local mycmakeargs=( + -D Python3_EXECUTABLE="${PYTHON}" + -D CMAKE_INSTALL_PREFIX=/usr + -D CMAKE_SKIP_RPATH=ON + -D LLVM_BINUTILS_INCDIR=/usr/include + -D LLVM_ENABLE_PROJECTS=mlir + -D BUILD_SHARED_LIBS=OFF + -D LLVM_STATIC_LINK_CXX_STDLIB=ON + -D LLVM_ENABLE_ASSERTIONS=ON + -D LLVM_BUILD_EXAMPLES=OFF + -D LLVM_ENABLE_BINDINGS=OFF + -D LLVM_ENABLE_OCAMLDOC=OFF + -D LLVM_OPTIMIZED_TABLEGEN=ON + -D LLVM_EXTERNAL_PROJECTS=circt + -D LLVM_EXTERNAL_CIRCT_SOURCE_DIR="${S_CIRCT}" + -D LLVM_BUILD_TOOLS=ON + ) + cmake_src_configure +} + +src_test() { + pushd "${BUILD_DIR}" || die + eninja check-mlir + eninja check-circt + eninja check-circt-integration + popd || die +} + +src_install() { + mv "${S_LLVM}/llvm/LICENSE.TXT" "${S_LLVM}/llvm/llvm-LICENSE.TXT" || die + mv "${S_LLVM}/mlir/LICENSE.TXT" "${S_LLVM}/mlir/mlir-LICENSE.TXT" || die + mv "${S_CIRCT}/LICENSE" "${S_CIRCT}/circt-LICENSE" || die + einstalldocs + exeinto /usr/bin + doexe "${BUILD_DIR}"/bin/arcilator + doexe "${BUILD_DIR}"/bin/circt-as + doexe "${BUILD_DIR}"/bin/circt-cocotb-driver.py + doexe "${BUILD_DIR}"/bin/circt-dis + doexe "${BUILD_DIR}"/bin/circt-lec + doexe "${BUILD_DIR}"/bin/circt-lsp-server + doexe "${BUILD_DIR}"/bin/circt-opt + doexe "${BUILD_DIR}"/bin/circt-reduce + doexe "${BUILD_DIR}"/bin/circt-rtl-sim.py + doexe "${BUILD_DIR}"/bin/circt-translate + doexe "${BUILD_DIR}"/bin/firtool + doexe "${BUILD_DIR}"/bin/handshake-runner + doexe "${BUILD_DIR}"/bin/hlstool + doexe "${BUILD_DIR}"/bin/ibistool + doexe "${BUILD_DIR}"/bin/llhd-sim + doexe "${BUILD_DIR}"/bin/om-linker + doexe "${BUILD_DIR}"/bin/py-split-input-file.py + # llhd-sim not static linked + dolib.so "${BUILD_DIR}"/lib/libcirct-llhd-signals-runtime-wrappers.so +} |