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* target-ppc: mark a few helpers TCG_CALL_CONST and/or TCG_CALL_PUREaurel322009-04-161-19/+19
* targe-ppc: optimize mfcr and mtcrfaurel322009-03-091-3/+0
* target-ppc: Add vrsqrtefp instructionaurel322009-02-091-0/+1
* target-ppc: Add vrefp instructionaurel322009-02-091-0/+1
* target-ppc: Add vct{u,s}xs instructionsaurel322009-02-091-0/+2
* target-ppc: Add vcmp{eq, ge, gt, b}fp{, .} instructionsaurel322009-02-091-0/+8
* target-ppc: Add vmaddfp and vnmsubfp instructionsaurel322009-02-091-0/+2
* target-ppc: Add v{add,sub}fp instructionsaurel322009-02-091-0/+2
* target-ppc: Add v{max,min}fp instructionsaurel322009-02-091-0/+2
* target-ppc: change instruction name vrlogefp into vlogefpaurel322009-02-051-1/+1
* target-ppc: add vrlogefp instructionaurel322009-02-051-0/+1
* Add vcf{u,s}x instructionsaurel322009-02-041-0/+2
* Add vrfi{m,n,p,z} instructionsaurel322009-02-041-0/+4
* Make mtvscr use a helperaurel322009-02-031-0/+1
* Add v{add, sub}{s, u}{b, h, w}s instructionsaurel322009-01-081-0/+12
* Add vspltis{b,h,w} instructionsaurel322009-01-081-0/+3
* Add vs{l,r} instructionsaurel322009-01-081-0/+2
* Add vcmpequ{b, h, w} and vcmpgt{s, u}{b, h, w} instructionsaurel322009-01-081-0/+18
* Add vsumsws, vsum2sws, and vsum4{sbs, shs,ubs} instructions.aurel322009-01-041-0/+5
* Add {l,st}ve{b,h,w}x instructions.aurel322009-01-041-0/+6
* Add vmladduhm instruction.aurel322009-01-041-0/+1
* Add vmsumsh{m,s} instructions.aurel322009-01-041-0/+2
* Add vmsumuh{m,s} instructions.aurel322009-01-041-0/+2
* Add vmh{,r}addshs instructions.aurel322009-01-041-0/+2
* Add vpkpx instruction.aurel322009-01-041-0/+1
* Add vpks{h, w}{s, u}s, vpku{h, w}us, and vpku{h, w}um instructions.aurel322009-01-041-0/+8
* Add vsel and vperm instructions.aurel322009-01-041-0/+2
* Add vmsum{u,m}bm instructions.aurel322009-01-041-0/+2
* Add vupk{h,l}s{b,h} instructions.aurel322009-01-041-0/+4
* Add vupk{h,l}px instructions.aurel322009-01-041-0/+2
* Add vsplt{b,h,w} instructions.aurel322009-01-041-0/+3
* Add vsldoi instruction.aurel322009-01-041-0/+1
* Add vrl{b,h,w} instructions.aurel322009-01-041-0/+3
* Add lvs{l,r} instructions.aurel322009-01-041-0/+2
* Add v{add,sub}cuw instructions.aurel322009-01-041-0/+2
* Add vs{l,r}o instructions.aurel322009-01-041-0/+2
* Add vsl{b,h,w} instructions.aurel322009-01-041-0/+3
* Add vsr{,a}{b,h,w} instructions.aurel322009-01-041-0/+6
* Add vmul{e,o}{s,u}{b,h} instructions.aurel322009-01-041-0/+8
* Add vmrg{l,h}{b,h,w} instructions.aurel322009-01-041-0/+6
* Add v{min, max}{s, u}{b, h, w} instructions.aurel322009-01-031-0/+12
* Add vavg{s,u}{b,h,w} instructions.aurel322009-01-031-0/+7
* Add v{add,sub}u{b,h,w}m instructions.aurel322009-01-031-0/+9
* target-ppc: fix fcmp{o,u} instructionsaurel322008-12-141-2/+2
* target-ppc: fix mtfsb0 and mtfsb1aurel322008-12-141-0/+1
* target-ppc: rework exception codeaurel322008-12-111-1/+1
* target-ppc: convert SPR accesses to TCGaurel322008-12-071-2/+39
* target-ppc: convert SLB/TLB instructions to TCGaurel322008-12-061-4/+22
* target-ppc: convert dcr load/store to TCGaurel322008-12-061-0/+3
* target-ppc: convert msr load/store to TCGaurel322008-12-061-0/+1