IA64 also need to workaround tcg breakage on non-x86

Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>

3 files changed, 44 insertions, 2 deletions

diff --git a/dyngen.c b/dyngen.c
index e5122e373..146d4ecd5 100644
--- a/dyngen.c
+++ b/dyngen.c
@@ -2767,7 +2767,6 @@ fprintf(outfile,
 "    uint8_t *arm_pool_ptr = gen_code_buf + 0x1000000;\n");
 #endif
 #ifdef HOST_IA64
-#error broken
     {
 	long addend, not_first = 0;
 	unsigned long sym_idx;
diff --git a/hw/ipf.c b/hw/ipf.c
index ce67715aa..8c5304d52 100644
--- a/hw/ipf.c
+++ b/hw/ipf.c
@@ -37,7 +37,6 @@
 #include "boards.h"
 #include "firmware.h"
 #include "ia64intrin.h"
-#include "dyngen.h"
 #include <unistd.h>
 
 #include "qemu-kvm.h"
diff --git a/target-ia64/fake-exec.c b/target-ia64/fake-exec.c
new file mode 100644
index 000000000..0be4ffd0d
--- /dev/null
+++ b/target-ia64/fake-exec.c
@@ -0,0 +1,44 @@
+/*
+ * fake-exec.c for ia64.
+ *
+ * This is a file for stub functions so that compilation is possible
+ * when TCG CPU emulation is disabled during compilation.
+ *
+ * Copyright 2007 IBM Corporation.
+ * Added by & Authors:
+ * 	Jerone Young <jyoung5@us.ibm.com>
+ *
+ * Copyright 2008 Intel Corporation.
+ * Added by Xiantao Zhang <xiantao.zhang@intel.com>
+ *
+ * This work is licensed under the GNU GPL licence version 2 or later.
+ *
+ */
+#include "exec.h"
+#include "cpu.h"
+
+int code_copy_enabled = 0;
+
+void cpu_gen_init(void)
+{
+}
+
+unsigned long code_gen_max_block_size(void)
+{
+    return 32;
+}
+
+int cpu_ia64_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
+{
+    return 0;
+}
+
+void flush_icache_range(unsigned long start, unsigned long stop)
+{
+    while (start < stop) {
+	asm volatile ("fc %0" :: "r"(start));
+	start += 32;
+    }
+    asm volatile (";;sync.i;;srlz.i;;");
+}
+