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authorPaul Walker <paul.walker@arm.com>2023-10-27 16:53:30 +0100
committerTobias Hieta <tobias@hieta.se>2023-10-30 12:56:05 +0100
commit615beaec04f9b8f44cc9430a481fafab3f90d861 (patch)
tree3feddbd5474ef4fb455fbe355b2ba6a4016318c3
parent[MemCpyOpt] Combine alias metadatas when replacing byval arguments (#70580) (diff)
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[SVE] Fix incorrect offset calculation when rewriting an instruction's frame index. (#70315)
When partially packing an offset into an SVE load/store instruction we are incorrectly calculating the remainder. (cherry picked from commit 7c90be2857fc4c6a2e67f203ca289ed7773fae03)
-rw-r--r--llvm/lib/Target/AArch64/AArch64InstrInfo.cpp2
-rw-r--r--llvm/test/CodeGen/AArch64/framelayout-sve.mir22
2 files changed, 23 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 30bd580ad86a..0691e07a639b 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -4764,7 +4764,7 @@ int llvm::isAArch64FrameOffsetLegal(const MachineInstr &MI,
Offset = Remainder;
else {
NewOffset = NewOffset < 0 ? MinOff : MaxOff;
- Offset = Offset - NewOffset * Scale + Remainder;
+ Offset = Offset - NewOffset * Scale;
}
if (EmittableOffset)
diff --git a/llvm/test/CodeGen/AArch64/framelayout-sve.mir b/llvm/test/CodeGen/AArch64/framelayout-sve.mir
index 54d6a5fc1997..7c87587c6dc4 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-sve.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-sve.mir
@@ -41,6 +41,7 @@
define aarch64_sve_vector_pcs void @save_restore_sve_realign() uwtable { entry: unreachable }
define aarch64_sve_vector_pcs void @frame_layout() uwtable { entry: unreachable }
define void @fp_relative_index_with_float_save() uwtable { entry: unreachable }
+ define void @fp_relative_that_is_not_a_multiple_of_VLx16() uwtable { entry: unreachable }
...
# +----------+
@@ -1287,3 +1288,24 @@ body: |
RET_ReallyLR
---
+...
+# CHECK-LABEL: name: fp_relative_that_is_not_a_multiple_of_VLx16
+# CHECK: - { id: 0, name: '', type: default, offset: -156, size: 156, alignment: 1,
+# CHECK-NEXT: stack-id: scalable-vector
+# CHECK: - { id: 1, name: '', type: variable-sized, offset: -32, alignment: 1,
+# CHECK-NEXT: stack-id: default
+
+# CHECK: $x8 = ADDPL_XXI $fp, -14
+# CHECK-NEXT: $z0 = LD1W_IMM killed renamable $p0, killed $x8, -8
+
+name: fp_relative_that_is_not_a_multiple_of_VLx16
+stack:
+ - { id: 0, stack-id: scalable-vector, size: 156, alignment: 1 }
+ - { id: 1, stack-id: default, type: variable-sized, alignment: 1 }
+body: |
+ bb.0.entry:
+ liveins: $p0
+
+ renamable $z0 = LD1W_IMM killed renamable $p0, %stack.0, 0
+ RET_ReallyLR
+---