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authorSanjay Patel <spatel@rotateright.com>2022-07-22 13:56:12 -0400
committerSanjay Patel <spatel@rotateright.com>2022-07-22 14:27:52 -0400
commit479c1886c589a58871e3ef09b2e414657f78dcd5 (patch)
tree3a910479b34654f820d18e97bb09b4adb27a5b18
parent[BOLT] Handle broken .dynsym in stripped binaries (diff)
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[PhaseOrdering] add test for loop-idiom-recognize + tailcall; NFC
-rw-r--r--llvm/test/Transforms/PhaseOrdering/memset-tail.ll33
1 files changed, 33 insertions, 0 deletions
diff --git a/llvm/test/Transforms/PhaseOrdering/memset-tail.ll b/llvm/test/Transforms/PhaseOrdering/memset-tail.ll
new file mode 100644
index 000000000000..83ff8f17bccc
--- /dev/null
+++ b/llvm/test/Transforms/PhaseOrdering/memset-tail.ll
@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes='default<O2>' -S < %s | FileCheck %s
+
+define void @PR47852(ptr noundef %d, i32 noundef %c) {
+; CHECK-LABEL: @PR47852(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_NOT1:%.*]] = icmp eq i32 [[C:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP_NOT1]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]
+; CHECK: while.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[C]] to i64
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[D:%.*]], i8 0, i64 [[TMP0]], i1 false)
+; CHECK-NEXT: br label [[WHILE_END]]
+; CHECK: while.end:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %while.cond
+
+while.cond:
+ %c.addr.0 = phi i32 [ %c, %entry ], [ %dec, %while.body ]
+ %d.addr.0 = phi ptr [ %d, %entry ], [ %incdec.ptr, %while.body ]
+ %dec = add i32 %c.addr.0, -1
+ %cmp = icmp ugt i32 %c.addr.0, 0
+ br i1 %cmp, label %while.body, label %while.end
+
+while.body:
+ %incdec.ptr = getelementptr inbounds i8, ptr %d.addr.0, i32 1
+ store i8 0, ptr %d.addr.0, align 1
+ br label %while.cond
+
+while.end:
+ ret void
+}