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* * config/m68k-parse.h (enum m68k_register): Add ACR[4-7], RGPIOBAR.Maxim Kuvyrkov2009-11-102-2/+10
| | | | | | | | | | | * config/tc-m68k.c (mcf5206_ctrl): Fix whitespace. (mcf52223_ctrl): Remove non-existent registers. (mcf54418): Define. (mcf54455): Remove MBAR. (m68k_cpus): Add lines for MCF5441x family. (m68k_ip, init_table): Handle RGPIOBAR, ACR[4-7]. * m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
* 2009-11-06 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop2009-11-062-9/+15
| | | | | | | | | | | | | * opcodes/i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to B.mm in the RXB.mmmmm byte, and so when B is set, we still should use the xop_table. (get_valid_dis386): Removed unused condition (from cut/n/paste) for XOP instructions. * gas/testsuite/gas/i386/x86-64-lwp.s: Updated to also contain patterns with r[8-15] registers. * gas/testsuite/gas/i386/x86-64-lwp.d: Same.
* 2009-11-05 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop2009-11-057-4806/+5763
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Quentin Neill <quentin.neill@amd.com> * gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS. (build_vex_prefix): Handle xop09 and xop0a. (build_modrm_byte): Handle vexlwp. (md_show_usage): Add lwp. * gas/doc/c-i386.texi (i386-LWP): New section. * gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode, run lwp in 32-bit mode. * gas/testsuite/gas/i386/x86-64-lwp.d: New. * gas/testsuite/gas/i386/x86-64-lwp.s: New. * gas/testsuite/gas/i386/lwp.d: New. * gas/testsuite/gas/i386/lwp.s: New. * opcodes/i386-dis.c (OP_LWPCB_E): New. (OP_LWP_E): New. (OP_LWP_I): New. (USE_XOP_8F_TABLE): New. (XOP_8F_TABLE): New. (REG_XOP_LWPCB): New. (REG_XOP_LWP): New. (XOP_09): New. (XOP_0A): New. (reg_table): Redirect REG_8F to XOP_8F_TABLE. Add entries for REG_XOP_LWPCB and REG_XOP_LWP. (xop_table): New. (get_valid_dis386): Handle USE_XOP_8F_TABLE. Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values to access to the vex_table. (OP_LWPCB_E): New. (OP_LWP_E): New. (OP_LWP_I): New. * opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP. (cpu_flags): Add CpuLWP. (opcode_modifiers): Add VexLWP, XOP09, and XOP0A. * opcodes/i386-opc.h (CpuLWP): New. (i386_cpu_flags): Add bit cpulwp. (VexLWP): New. (XOP09): New. (XOP0A): New. (i386_opcode_modifier): Add vexlwp, xop09, and xop0a. * opcodes/i386-opc.tbl (llwpcb): Added. (lwpval): Added. (lwpins): Added.
* [opcodes]DJ Delorie2009-11-051-27/+55
| | | | | | | | | | | | | | | * rx-decode.opc (rx_decode_opcode) (mvtipl): Add. (mvtcp, mvfcp, opecp): Remove. * rx-decode.c: Regenerate. * rx-dis.c (cpen): Remove. [gas] * config/rx-parse.y (MVTIPL): Update bit pattern. (cpen): Remove. [include/opcode] * rx.h (rx_decode_opcode) (mvtipl): Add. (mvtcp, mvfcp, opecp): Remove.
* [opcodes]DJ Delorie2009-11-053-10/+11
| | | | | | | | | | | | | | | * rx-decode.opc (rx_decode_opcode) (mvtipl): Add. (mvtcp, mvfcp, opecp): Remove. * rx-decode.c: Regenerate. * rx-dis.c (cpen): Remove. [gas] * config/rx-parse.y (MVTIPL): Update bit pattern. (cpen): Remove. [include/opcode] * rx.h (rx_decode_opcode) (mvtipl): Add. (mvtcp, mvfcp, opecp): Remove.
* * m32c-desc.c: Regenerate.Doug Evans2009-11-043-2/+7
| | | | * mep-desc.c: Regenerate.
* 2009-11-02 Paul Brook <paul@codesourcery.com>Paul Brook2009-11-022-7/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ld/testsuite/ * ld-arm/arm-elf.exp: Add new attr-merge-vfp tests. * ld-arm/attr-merge-vfp-1.d: New test. * ld-arm/attr-merge-vfp-1r.d: New test. * ld-arm/attr-merge-vfp-2.d: New test. * ld-arm/attr-merge-vfp-2r.d: New test. * ld-arm/attr-merge-vfp-3.d: New test. * ld-arm/attr-merge-vfp-3r.d: New test. * ld-arm/attr-merge-vfp-4.d: New test. * ld-arm/attr-merge-vfp-4r.d: New test. * ld-arm/attr-merge-vfp-5.d: New test. * ld-arm/attr-merge-vfp-5r.d: New test. * ld-arm/attr-merge-vfp-2.s: New test. * ld-arm/attr-merge-vfp-3.s: New test. * ld-arm/attr-merge-vfp-3-d16.s: New test. * ld-arm/attr-merge-vfp-4.s: New test. * ld-arm/attr-merge-vfp-4-d16.s: New test. gas/ * doc/c-arm.texi: Document new -mfpu options. * config/tc-arm.c (fpu_vfp_ext_v3xd, fpu_vfp_fp16, fpu_neon_ext_fma, fpu_vfp_ext_fma): New. (NEON_ENC_TAB): Add vfma, vfms, vfnma and vfnms. (do_vfp_nsyn_fma_fms, do_neon_fmac): New functions. (insns): Move double precision load/store. Split out double precision VFPv3 instrucitons. Add VFPv4 instructions. (arm_fpus): Add VFPv3-FP16, VFPv3xD and VFPv4 variants. (aeabi_set_public_attributes): Set VFPv4 variants gas/testsuite/ * gas/arm/attr-mfpu-vfpv4.d: New test. * gas/arm/attr-mfpu-vfpv4-d16.d: New test. * gas/arm/neon-fma-cov.d: New test. * gas/arm/neon-fma-cov.s: New test. * gas/arm/vfp-fma-inc.s: New test. * gas/arm/vfp-fma-arm.d: New test. * gas/arm/vfp-fma-arm.s: New test. * gas/arm/vfp-fma-thumb.d: New test. * gas/arm/vfp-fma-thumb.s: New test. * gas/arm/vfma1.d: New test. * gas/arm/vfma1.s: New test. * gas/arm/vfpv3xd.d: New test. * gas/arm/vfpv3xd.s: New test. include/opcode/ * arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA, FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define. (FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD, FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16, FPU_ARCH_NEON_VFP_V4): Define. binutils/ * readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16. bfd/ * elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle VFPv4 attributes. opcodes/ * arm-dis.c (coprocessor_opcodes): Update to use new feature flags. Add VFPv4 instructions.
* gas/H.J. Lu2009-10-292-66/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 2009-10-29 Sebastian Pop <sebastian.pop@amd.com> * config/tc-i386.c (build_modrm_byte): Do not swap REG and NDS operands for FMA4. gas/testsuite/ 2009-10-29 Sebastian Pop <sebastian.pop@amd.com> * gas/i386/fma4.d: Updated patterns. * gas/i386/x86-64-fma4.d: Same. opcodes/ 2009-10-29 Sebastian Pop <sebastian.pop@amd.com> * i386-dis.c (OP_VEX_FMA): Removed. (VexFMA): Removed. (Vex128FMA): Removed. (prefix_table): First source operand of FMA4 insns is decoded with Vex not with VexFMA. (OP_EX_VexW): Second source operand is decoded with get_vex_imm8 when vex.w is set. Third source operand is decoded with get_vex_imm8 when vex.w is cleared. (OP_VEX_FMA): Removed.
* * Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h.Alan Modra2009-10-273-2/+6
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* cpu/Doug Evans2009-10-2417-502/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h. cgen-ops.h -> cgen/basic-ops.h. include/opcode/ * cgen-bitset.h: Delete, moved to ../cgen/bitset.h. * cgen.h: Update. Improve multi-inclusion macro name. include/cgen/ * basic-modes.h: New file. Moved here from opcodes/cgen-types.h. * basic-ops.h: New file. Moved here from opcodes/cgen-ops.h. * bitset.h: New file. Moved here from ../opcode/cgen-bitset.h. Update license to GPL v3. opcodes/ * cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h. * cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h. * cgen-bitset.c: Update. * fr30-desc.h: Regenerate. * frv-desc.h: Regenerate. * ip2k-desc.h: Regenerate. * iq2000-desc.h: Regenerate. * lm32-desc.h: Regenerate. * m32c-desc.h: Regenerate. * m32c-opc.h: Regenerate. * m32r-desc.h: Regenerate. * mep-desc.h: Regenerate. * mt-desc.h: Regenerate. * openrisc-desc.h: Regenerate. * xc16x-desc.h: Regenerate. * xstormy16-desc.h: Regenerate.
* * rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.DJ Delorie2009-10-233-619/+624
| | | | * rx-decode.c: Regenerated.
* gas/H.J. Lu2009-10-202-34/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * doc/c-i386.texi: Mention movabs. gas/testsuite/ 2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * gas/i386/immed64.d: Updated. * gas/i386/l1om.d: Likewise. * gas/i386/x86-64-disp-intel.d: Likewise. * gas/i386/x86-64-disp.d: Likewise. * gas/i386/x86_64.d: Likewise. opcodes/ 2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * i386-dis.c: Document LB, LS and LV macros. (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction with the 64-bit displacement or immediate operand. (putop): Handle LB, LS and LV macros.
* * lm32-opinst.c: Regenerate.Doug Evans2009-10-197-69/+74
| | | | | | | | * m32c-desc.c: Regenerate. * m32r-opinst.c: Regenerate. * openrisc-ibld.c: Regenerate. * xc16x-desc.c: Regenerate. * xc16x-desc.h: Regenerate.
* * Makefile.am (CGEN_CPUS): Add iq2000, lm32.Doug Evans2009-10-173-64/+75
| | | | | | | | (FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are sorted alphabetically. (stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen stamp-* rules are sorted alphabetically. * Makefile.in: Regenerate.
* 2009-10-16 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-10-162-301/+313
| | | | * i386-opc.h: Use enum instead of nested macros.
* 2009-10-16 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-10-162-795/+799
| | | | * i386-dis.c: Simplify enums.
* 2009-10-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-10-152-843/+878
| | | | | | | Ineiev <ineiev@gmail.com> PR binutils/10767 * i386-dis.c: Use enum instead of nested macros.
* 2009-10-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-10-152-2/+4
| | | | * i386-dis.c (MAX_BYTEMODE): Removed.
* PR 969Alan Modra2009-10-142-2/+7
| | | | * m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
* 2009-10-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-10-132-5/+11
| | | | | * i386-dis.c (print_insn): Always clear need_vex, need_vex_reg and vex_w_done.
* * opcodes/microblaze-dis.c: Add include for microblaze-dis.h,Michael Eager2009-10-073-6/+42
| | | | | eliminate local extern decls. * opcodes/microblaze-dis.h: New.
* Updated Finnish translationNick Clifton2009-10-062-164/+247
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* * opc2c.c: Include "libiberty.h" and <errno.h>.Nick Clifton2009-10-055-630/+656
| | | | | | | | | | | | | | | | | (orig_filename): Constify. (dump_lines): Fix line number directive. (main): Set orig_filename to basename of input file. Use xstrerror. * Makefile.am (rx-dis.lo): Remove explicit dependencies. ($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD) instead of $(EXEEXT). (opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use $(LINK_FOR_BUILD). Link with libiberty. (MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD). (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c. * Makefile.in: Regenerated. * rx-decode.c: Regenerated.
* Revert the last change.H.J. Lu2009-10-033-21/+10
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* 2009-10-03 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-10-033-10/+21
| | | | | | | | | * Makefile.am ($(srcdir)/rx-decode.c): Add @MAINT@. (rx-dis.lo): Remove a space. (pc2c$(EXEEXT)): Remove a space. Use $(LINK_FOR_BUILD) instead of gcc. (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c. * Makefile.in: Regenerated.
* * arm-dis.c (print_insn): Check symtab_size not *symtab.Alan Modra2009-10-032-2/+5
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* 2009-10-02 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-10-023-76/+81
| | | | | * i386-opc.tbl: Drop Disp64 on jump and loop instructions. * i386-tbl.h: Regenerated.
* typo fixAlan Modra2009-10-021-17/+17
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* gas/Peter Bergner2009-10-023-84/+103
| | | | | | | | | | | | | | | | | | * config/tc-ppc.c (md_show_usage): Document -m476. * doc/c-ppc.texi (PowerPC-Opts): Document -m476. gas/testsuite/ * gas/ppc/476.s: New test. * gas/ppc/476.d: Likewise. * gas/ppc/ppc.exp: Run the 476 test. include/opcode/ * ppc.h (PPC_OPCODE_476): Define. opcodes/ * ppc-dis.c (ppc_opts): Add "476" entry. * ppc-opc.c (PPC476): Define. (powerpc_opcodes): Update mnemonics where required for 476.
* gas/Peter Bergner2009-10-013-3/+9
| | | | | | | | | | | | | | | | * config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2". * doc/c-ppc.texi (PowerPC-Opts): Likewise. gas/testsuite/ * gas/ppc/a2.d: Rename "ppca2" to "a2". include/opcode/ * ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2. opcodes/ * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2. * ppc-dis.c (ppc_opts): Likewise. Rename "ppca2" to "a2".
* 2009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>M R Swami Reddy2009-10-012-1/+5
| | | | * crx-dis.c (match_opcode): Truncate mcode to 32-bit.
* bfdNick Clifton2009-09-2910-0/+16842
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Makefile.am (ALL_MACHINES): Add cpu-rx.lo. (ALL_MACHINES_CFILES): Add cpu-rx.c. (BFD32_BACKENDS): Add elf32-rx.lo. (BFD32_BACKENDS_CFILES): Add elf32-rx.c. * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx. Export bfd_rx_arch. (bfd_archures_list): Add bfd_rx_arch. * config.bfd: Add entry for rx-*-elf. * configure.in: Add entries for bfd_elf32_rx_le_vec and bfd_elf32_rx_be_vec. * reloc.c: Add RX relocations. * targets.c: Add RX target vectors. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rx.c: New file. * elf32-rx.c: New file. binutils * readelf.c: Add support for RX target. * MAINTAINERS: Add DJ and NickC as maintainers for RX. gas * Makefile.am: Add RX target. * configure.in: Likewise. * configure.tgt: Likewise. * read.c (do_repeat_with_expander): New function. * read.h: Provide a prototype for do_repeat_with_expander. * doc/Makefile.am: Add RX target documentation. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * Makefile.in: Regenerate. * NEWS: Mention support for RX architecture. * configure: Regenerate. * doc/Makefile.in: Regenerate. * config/rx-defs.h: New file. * config/rx-parse.y: New file. * config/tc-rx.h: New file. * config/tc-rx.c: New file. * doc/c-rx.texi: New file. gas/testsuite * gas/rx: New directory. * gas/rx/*: New set of test cases. * gas/elf/section2.e-rx: New expected output file. * gas/all/gas.exp: Add support for RX target. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. * gas/macros/macros.exp: Likewise. include * dis-asm.h: Add prototype for print_insn_rx. include/elf * rx.h: New file. include/opcode * rx.h: New file. ld * Makefile.am: Add rules to build RX emulation. * configure.tgt: Likewise. * NEWS: Mention support for RX architecture. * Makefile.in: Regenerate. * emulparams/elf32rx.sh: New file. * emultempl/rxelf.em: New file. opcodes * Makefile.am: Add RX files. * configure.in: Add support for RX target. * disassemble.c: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * opc2c.c: New file. * rx-decode.c: New file. * rx-decode.opc: New file. * rx-dis.c: New file.
* opcodes/Peter Bergner2009-09-292-12/+5
| | | | | | | | | | | | * ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux", "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes. gas/testsuite/ * gas/ppc/vsx.s ("lxsdux", "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux", "stxvw4ux"): Remove tests. * gas/ppc/vsx.d: Likewise. * gas/ppc/power7.s: Likewise. * gas/ppc/power7.d: Likewise.
* 2009-09-25 Michael Eager <eager@eagercon.com>Michael Eager2009-09-252-18/+15
| | | | | | * microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address, microblaze_decode_insn): Add declarations. (get_delay_slots_microblaze): Remove.
* Update soruces to make alpha, arc and arm targets compile cleanlyNick Clifton2009-09-254-7/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | with -Wc++-compat: * config/tc-alpha.c: Add casts. (extended_bfd_reloc_code_real_type): New type. Used to avoid enumeration conversion warnings. (struct alpha_fixup, void assemble_insn, assemble_insn) (assemble_tokens): Use new type. * ecoff.c: Add casts. (mark_stabs): Use enumeration names. * config/obj-elf.c: Add cast * config/tc-arc.c: Add casts. * config/obj-aout.h (text_section,data_section,bss_section): Make extern. * config/obj-elf.c: Add cast. * config/tc-arm.c: Add casts. (X, TxCE, TxCE, TxC3, TxC3w, TxCM_, TxCM, TUE, TUF, CE, CL, cCE) (cCL, C3E, xCM_, nUF, nCE_tag): Change input format to avoid the need for keywords as arguments. * ecoff.c: Add casts. * ecofflink.c: Add casts. * elf64-alpha.c: Add casts. (struct alpha_elf_got_entry, struct alpha_elf_reloc_entry): Move to top level. (SKIP_HOWTO): Use enum name. * elf32-arm.c: Add casts. (elf32_arm_vxworks_bed): Update code to avoid multiple declarations. (struct map_stub): Move to top level. * arc-dis.c Fix casts. * arc-ext.c: Add casts. * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous enum. * emultempl/armelf.em: Add casts.
* gas/H.J. Lu2009-09-245-3394/+3429
| | | | | | | | | | | | | | | | | | | | | | 2009-09-24 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (build_vex_prefix): Check vex == 2 instead of vex256. opcodes/ 2009-09-24 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Remove Vex256. (set_bitfield): Handle XXX=V. * i386-opc.h (Vex): Update comments. (Vex256): Removed. (VexNDS): Updated. (i386_opcode_modifier): Change vex to 2 bits. Remove vex256. * i386-opc.tbl: Replace "Vex|Vex256" with Vex=2. * i386-tbl.h: Regenerated.
* Updated French and Vietnamese translations.Nick Clifton2009-09-232-125/+208
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* gas/Ben Elliston2009-09-213-85/+143
| | | | | | | | | | | | | | | | | | | | | | | | * config/tc-ppc.c (md_show_usage): Document -mpcca2. * doc/c-ppc.texi (PowerPC-Opts): Document -mppca2. gas/testsuite/ * gas/ppc/a2.s: New. * gas/ppc/a2.d: Likewise. * gas/ppc/ppc.exp: Run the a2 dump test. include/opcode/ * ppc.h (PPC_OPCODE_PPCA2): New. opcodes/ * ppc-dis.c (ppc_opts): Add "ppca2" entry. * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx., eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx, icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx., ici mnemonics. (ERAT_T): New operand. (XWC_MASK): New mask. (XOPL2): New macro. (PPCA2): Define.
* Updated Spanish and Vietnamese translationsNick Clifton2009-09-183-259/+421
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* 2009-09-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-09-152-1/+6
| | | | | * i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if disp == -disp.
* Updated German, Dutch and Finnish translations.Nick Clifton2009-09-142-124/+212
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* * po/bfd.pot: Updated by the Translation project.Nick Clifton2009-09-112-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * po/binutils.pot: Updated by the Translation project. * po/gold.pot: Updated by the Translation project. * po/gold.pot: Updated by the Translation project. * po/gprof.pot: Updated by the Translation project. * po/sv.po: Updated Swedish translation. * po/ld.pot: Updated by the Translation project. * po/fi.po: Updated Finnish translation. * po/ld.pot: Updated by the Translation project. * po/fi.po: Updated Finnish translation. Updated sources to compile cleanly with -Wc++-compat: * basic_blocks.c: Add casts. * cg_dfn.c: Add cast. * corefile.c: Add casts. * gmon_io.c: Add casts. * hist.c: Add cast. * source.c: Add cast. * sym_ids.c (struct match): Moved to top level. Updated soruces in ld/* to compile cleanly with -Wc++-compat: * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level. * ldcref.c: Add casts. * ldctor.c: Add casts. * ldexp.c * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level. * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer. * ldlang.h (enum statement_enum): Move to top level. * ldmain.c: Add casts. * ldwrite.c: Add casts. * lexsup.c: Add casts. (enum control_enum): Move to top level. * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer. Updated sources to compile cleanly with -Wc++-compat: * basic_blocks.c: Add casts. * cg_dfn.c: Add cast. * corefile.c: Add casts. * gmon_io.c: Add casts. * hist.c: Add cast. * source.c: Add cast. * sym_ids.c (struct match): Moved to top level. * as.c (main): Call dwarf2_init. * config/obj-elf.c (struct group_list): New field. (build_group_lists): Use hash lookup. (free_section_idx): New function. (elf_frob_file): Adjust. * dwarf2dbg.c (all_segs_hash, last_seg_ptr): New variables. (get_line_subseg): Adjust. (dwarf2_init): New function. * dwarf2dbg.h (dwarf2_init): New declaration.
* 2009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2009-09-102-2/+6
| | | | * s390-dis.c (print_insn_s390): Avoid 'long long'.
* 2009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2009-09-102-5/+11
| | | | | * s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands. (print_insn_s390): Signextend and shift pcrel operands before printing.
* 2009-09-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-09-092-2/+7
| | | | | * i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to VEX_LEN_AE_R_X_M_0 in comments.
* * cpu/mep.opc (mep_cgen_insn_supported_asm): Change the test to aDJ Delorie2009-09-082-1/+5
| | | | preprocessor macro, not an enum.
* * z8kgen.c (struct op): Replace unused flavor with id.Andreas Schwab2009-09-083-21/+37
| | | | | | | | | (opt): Remove extra xorb entry. (func): Use id field as fallback. (sub): Return new string, caller changed. (internal): Allocate end marker. Assign unique id before sorting. (gas): Likewise. Fix loop end condition. * z8k-opc.h: Regenerate.
* * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.Alan Modra2009-09-082-2/+6
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* * z8kgen.c (func): Fix thinko last patch.Alan Modra2009-09-072-1/+5
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* * z8kgen.c (func): Stabilize qsort of identically named entries.Alan Modra2009-09-073-12/+22
| | | | * z8k-opc.h: Regenerate.